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AMD memory encryption technologies

AMD memory encryption technologies

Posted Sep 9, 2016 6:37 UTC (Fri) by zuki (subscriber, #41808)
Parent article: AMD memory encryption technologies

I cannot figure out one thing:
the hypervisor knows the ASID of a guest. What stops the hypervisor from adding a page table mapping for itself using this ASID for all of pages it has allocated for the guest and scanning those pages for any useful secrets?

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AMD memory encryption technologies

Posted Sep 9, 2016 13:38 UTC (Fri) by yaap (subscriber, #71398) [Link]

Just guessing, but I would expect a read or write transaction to be tagged with the initiating ASID --- I can't see how the system could work otherwise in a multicore SMT system. Then the MMU hardware can check that the source ASID matches the target page ASID and if not block the access/trigger an exception.


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