Zeroing registers

That only works if you have a small enough register set to be able to fit that bitfield in an instruction. For 64-bit Arm, there are 32 integer registers, so even if you skip the bit that would be the stack pointer it won't reasonably fit in an instruction. For architectures with only 16 registers, a 16-bit bitfield obviously does fit (and you can shave off bits for SP etc). That's still a fairly large chunk of the instruction encoding space to use for one instruction, though. I think these days ISA architects prefer to be parsimonious with encoding space, because it's a limited resource and there will always be new features and instructions coming along in future that you'd like to fit in...