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Supporting shared TLB contexts

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By Jonathan Corbet
March 28, 2017

LSFMM 2017
A processor's translation lookaside buffer (TLB) caches the mappings from virtual to physical addresses. Looking up virtual addresses is expensive, so good performance often depends on making the best use of the TLB. In the memory-management track of the 2017 Linux Storage, Filesystem, and Memory-Management Summit, Mike Kravetz described a SPARC processor feature that can improve TLB performance and explored ways in which that feature could be supported.

On most processors, context switches between processes are expensive operation because they force the contents of the TLB to be flushed. SPARC differs, though, in that TLB entries carry a tag associating them with a specific context. Since the processor knows to ignore TLB entries that do not correspond to the process that is executing, there is no need to flush the TLB on context switches. That takes away much of the context-switch penalty, and, as a result, improves performance.

The SPARC context register has been supported in Linux for a long time. But, Kravetz said, recent SPARC processors have added a second register, meaning that any given process can be associated with two independent contexts at the same time. Kravetz, an Oracle employee, said that this [Mike Kravetz] helps these processors support "the most important application in the world" — the Oracle database — which is built around a set of processes working on a large shared-memory area. If the second context ID is assigned to that area, then the associated TLB entries can be shared across all of those processes.

He has posted a patch set allowing this register to be used for shared-memory areas. The patch is "80% SPARC code", though, so nobody but Dave Miller (the SPARC maintainer) has looked at it, he said. His hope was to draw more attention to this feature and work out the best way to expose the functionality of this second context ID to user space.

His thinking is to have a special virtual memory area (VMA) flag to indicate a memory region with a shared context. But that leaves the question of how that flag should be set; Kirill Shutemov observed that it could be difficult to provide a sane interface for this feature. Kravetz's proposal added a special flag to the mmap() and shmat() system calls. One nice feature of this approach is that it does not require exposing the shared-context ID to user space. Instead, the kernel sees that the flag was set, assigns a context ID, and ensures that all processes mapping the same area at the same virtual address use the same context.

Matthew Wilcox suggested that perhaps madvise() would be a better system call for this functionality. The problem with madvise(), Kravetz said, is that it creates an inherent race condition. The shared context ID is stored in the page-table entries, so it needs to be set up before any of those entries are created. In particular, it needs to be in place before the process faults any of the pages in the shared region. Otherwise, those prematurely faulted pages will not be associated with the shared ID.

Kravetz's first patch set only supported pages mapped from hugetlbfs, which was enough to cover the Oracle shared-memory area. But he noted that it would be nice to cover executable mappings as well. While that would enable the shared ID to be used with shared libraries; the more immediate use case was the Oracle database executable, of course. Dave Hansen reacted to this idea by observing that Oracle seems to be trying to glue its multiprocess implementation back into a single process. (This feature, it should be noted, would not play well with address-space layout randomization, since all mappings must be to the same virtual address).

It was suggested that, in essence, hugetlbfs is a second memory-management subsystem for the kernel, providing semantics that the original lacked. DAX, perhaps, is developing into a third. The shared-context flag is needed because hugetlbfs is a second subystem; otherwise, things would be shared more transparently. So perhaps the real answer is to get rid of hugetlbfs? The problem with that idea, Andrea Arcangeli said, is that hugetlbfs will always have a performance advantage over transparent huge pages because the huge pages are reserved ahead of time. There are not many hugetlbfs users out there, but those few really want it.

Arcangeli went on to say that the real problem with TLB performance is that Linux is still using small (4KB) pages; someday that page size is going to have to increase. Shutemov said that increase would be an ABI break, but Arcangeli countered that, when the x86-64 port was done, care was taken to not expose any boundaries smaller than 2MB to user space. That takes care of most potential ABI issues (on that architecture), but there are still cases where user space sees the smaller page size — mprotect() calls, for example. So Linux will not be able to get completely away from small pages anytime soon.

As the end of the session approached, Rik van Riel pulled the conversation back to the main topic by asking if there were any action items. It seems that there are no known bugs in Kravetz's patch set, other than the fact that it is limited to hugetlbfs, which ignores memory-allocation policies, cpusets, and more. Mel Gorman said that, since hugetlbfs is its own memory-management subsystem, it can do what it wants in that area; Michal Hocko suggested simply documenting the things that don't work properly. The final question came from Hansen, who asked whether this feature was really important or not. The answer seems to be "yes, because Oracle wants it".

Index entries for this article
KernelMemory management/Translation lookaside buffer
ConferenceStorage, Filesystem, and Memory-Management Summit/2017


to post comments

Supporting shared TLB contexts

Posted Mar 28, 2017 21:15 UTC (Tue) by jhoblitt (subscriber, #77733) [Link] (1 responses)

Is this for a shipping core (s7 ?) or a future product?

Supporting shared TLB contexts

Posted Mar 30, 2017 3:11 UTC (Thu) by mkravetz (guest, #31446) [Link]

The extra context register that makes efficient sharing possible started showing up in Niagara 2 processors. So, it has been around for quite some time.

use huge pages for code and read-only data

Posted Mar 29, 2017 12:09 UTC (Wed) by sorokin (guest, #88478) [Link] (1 responses)

> Arcangeli went on to say that the real problem with TLB performance is that Linux is still using small (4KB) pages; someday that page size is going to have to increase.

Probably a bit of offtopic, I want to ask nonetheless.

Some time ago I thought about how can OSes use huge pages and global pages widely. My idea was to load all text sections and all read-only data sections into huge pages available to all processes at the same addresses.

Pros are:
+ These pages can be huge (reducing TLB overhead)
+ These pages can be made global (reducing TLB overhead during process switching)
− The first loading of a shared-object will be slow (we can not do lazy binding, because the shared area can not be made writeble by userspace processes)
+ The second and next loadings of a shared-object will be instantaneous
+ No GOT and PLT overhead (fast shared libraries)
− Kernel needs to somehow arbitrate the process of loading and unloading shared-objects (implementation complexity), most likely kernel needs to be aware what shared libraries are loaded into which processes
− ASLR doesn't work
− Makes ROP easier (lots of code are loaded into each process)
± Probably practical only on 64-bit systems where we have plenty of available virtual space

So for me it sounds like we have better performance at expense of reduced exploit mitigation. What do others think? Do you think these trade-offs are reasonable? Or are my ideas completely crazy?

use huge pages for code and read-only data

Posted Mar 29, 2017 17:37 UTC (Wed) by hansendc (subscriber, #7363) [Link]

Could we do this? Sure. AIX did something like it.

Is it worth it? Probably not. For instance, we can't currently use large pages to map text (without app recompiling or using an LD_PRELOAD). We also can't cross a VMA boundary with a single huge page. Each shared library currently requires its own VMA (or set of them). Some of the library is mapped read-only, and some of it is read-write and MAP_PRIVATE. A huge page must be either r/w *or* r/o.

You bring up a bunch of ways that things *could* be faster, but they are not currently large pain points for most applications.

Supporting shared TLB contexts

Posted Mar 30, 2017 3:28 UTC (Thu) by jcm (subscriber, #18262) [Link]

Quick aside: the ASID (and VMID) bits in various architectures can be extended beyond the cache tags to TLB tags and often are. Combined with hardware TLB invalidate broadcasts preventing IPI storms you actually get a lot of uplift on some non-crufty architectures.

Also, it's worth noting that TLBs don't stand alone. And they vary in size. Every modern core actually has uTLBs closer to the translation engine and often has multiple configurable sized TLBs (cf AMD Zen for a public example).

Supporting shared TLB contexts

Posted Mar 31, 2017 0:22 UTC (Fri) by jcm (subscriber, #18262) [Link]

One other comment on this (and similar discussion)

We live in a world where we have (arbitrarily, and with both actual malice and nonsense in mind) created stupid separations between "software" and "hardware" people and we go to great lengths to make sure they never, ever meet. Wouldn't it be better if we actually had VM folks and hardware designers meet at such gatherings, rather than the current approach in the industry of "build every kind of hardware software might later want to use". Today's approach is too abstracted. Abstractions are great. We should, however, have smart people get together and discuss ways we could evolve technology in a cohesive fashion over time.

Or, we can continue in the current world. Certain large chip companies can shove things out at us and handle all of the lifting. But the result might not be as good as it could be if people talked. I'm speaking here of traditional legacy architectures, not necessarily what some of the emerging ones might be doing to address these kinds of problems through collaboration. But folks with x86 laptops and desktops have certain clear vendors in mind today.

Supporting shared TLB contexts

Posted Oct 15, 2018 10:46 UTC (Mon) by rkag (guest, #127916) [Link] (1 responses)

Is shared tlb suppported on Intel Architecture?

Supporting shared TLB contexts

Posted Oct 15, 2018 10:47 UTC (Mon) by rkag (guest, #127916) [Link]

I mean shared TLB QoS


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