Temporary problem

Yes, I mentioned Cerberas in one of my comments antecedent to these. Cerebrus puts SRAM on the tile, but this is still separate from the compute logic. Obviously so from the die shots. Have a look at DOI:10.1109/MM.2023.3256384. It's going a bit in that direction, but it's still emulating the NN network architecture with a traditional Von Neumann machine, with separate memory and compute and a load-compute-store architecture (however parallel, and emulating the network by modelling it as a matrix).